A Solution for Ultra-Low Bit-Error-Rate Interface of Superconductor-Semiconductor by Using an Error-Correction-Code Encoder

作者：Peng, Xizhu^*; Liu, Xiaoqiao; Mei, Yajun; Ren, Jie; Tang, He

来源：IEEE Transactions on Applied Superconductivity, 2019, 29(5): 1301604.

DOI：10.1109/TASC.2019.2900581

• SFQ
• interface
• bit error rate
• error correction codes
• hybrid memory

This paper introduces a solution for ultra-low bit-error-rate interface of superconductor-semiconductor. By using an error-correction-code encoder, the low bit-error-rate requirement could be relaxed considerably. The encoder in our research encodes 32-bit original data with six extra check bits that are generated based on the theory of linear block code to correct 1-bit error. The numerical analysis shows the bias margin of BER < 10(-10) expands more than 50% for a reported typical interface. Besides, the mean time between failure of the 32-bit interface running at 5 Gbps with 10(-12) BER improves from 6.25 s to 44 000 years, and the BER requirement for 1 h operation without error is relaxed from 1.7 x 10(-15) to 1.14 x 10(-8). The implementation uses an optimized 9-stage pipelined structure achieving low latency and high throughput. This encoder is simulated in logic-gate-level and we implemented a virtual SFQ logic which performs pulse clocked logic on a realistic field-programming-gate-array to verify the design.

• 单位
  中国科学院; 电子科技大学