Novel DQ transform and time delay module-based phase-locked loop

摘要

The Phase-Locked-Loop (PLL) based on quadrature signal generation (QSG) is widely used in the synchronization units of power systems. Being one of the most popular QSG-PLLs, the time delay unit-based PLL (TD-PLL) is simple and easy to implement. However, when the frequency of the input signal deviates from its rated value, the orthogonality of the QSG output signal and the original input signal cannot be guaranteed, which leads to the generation of double frequency components. To solve this problem, this paper analyzes the generation mechanism for the double frequency component of the TD-PLL. Then, a quadrature signal generation and processing module is built based on a DQ transform and time delay unit to eliminate the double frequency component. This ability is the key part of the proposed PLL (DQ-TD-PLL). Finally, the performance of DQ-TD-PLL is evaluated with simulations and experiments. The obtained results show that the proposed DQ-TD-PLL can eliminate the influence of double frequency component. It can also be seen that the proposed method has better dynamic performance when compared with other methods in the literature.

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