A Self-Biased Current Reference Source-Based Pre-Bond TSV Test Solution

作者：Liu, Jun^*; Cheng, Songren; Chen, Tian; Wu, Xi; Liang, Huaguo

来源：IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2023.

DOI：10.1109/TVLSI.2023.3344272

• Through-silicon vias
• Circuit faults
• Discharges (electric)
• Testing
• Time measurement
• Capacitance
• Delays
• 3-D integrated circuits (3-D ICs)
• pre-bond test
• self-biased current reference source (SCRS)
• through-silicon via (TSV)

In the realm of 3-D integrated circuits (ICs), the presence of faults within through-silicon vias (TSVs) poses a significant threat, potentially undermining their yield and reliability. Thus, a meticulous TSV testing procedure is imperative to guarantee the optimal performance of 3-D ICs. This article introduces a novel pre-bond TSV testing approach. The method employs a self-biased current reference source (SCRS) to charge and discharge TSVs. This approach not only detects open faults, leakage faults, and compound faults but also distinguishes between these fault types. Additionally, the SCRS allows for a reduction in current magnitude, effectively prolonging the charge and discharge duration of TSVs, thereby enhancing fault detection capabilities. The implementation of a SCRS bolsters the resilience of the proposed method against variations in process, voltage, and temperature (PVT). Experimental results substantiate the superiority of this technique in terms of fault detection efficacy, and robustness in the face of PVT fluctuations when compared to alternative approaches.